Time Delay

Some long time delay sliding mode control approaches

Manufacturing Engineering / Time Delay / Sliding mode control / First-Order Logic / ISA Transactions / Electrical And Electronic Engineering

Some long time delay sliding mode control approaches

Manufacturing Engineering / Time Delay / Sliding mode control / First-Order Logic / ISA Transactions / Electrical And Electronic Engineering

A Direct Bootstrapped CMOS Large Capacitive-Load Driver Circuit

Reconfigurable Computing / VLSI / Digital design / Wavelet Transform / Power Consumption / Time Delay / Codesign / First-Order Logic / Low Power Consumption / High Speed / System on a Chip / Place and Route / Structural Testing / Low voltage / Integrated Circuit Design / Time Delay / Codesign / First-Order Logic / Low Power Consumption / High Speed / System on a Chip / Place and Route / Structural Testing / Low voltage / Integrated Circuit Design

SINTONIZACIÓN DE CONTROLADORES PI Y PID UTILIZANDO LOS CRITERIOS INTEGRALES IAE E ITAE

Time Delay / First-Order Logic / Pid Controller / Second Order / Palabras Clave: BIM / Digital Simulation

SINTONIZACIÓN DE CONTROLADORES PI Y PID UTILIZANDO MODELOS DE POLO DOBLE MÁS TIEMPO MUERTO

Time Delay / First-Order Logic / Pid Controller / Second Order / Palabras Clave: BIM / Digital Simulation

A Direct Bootstrapped CMOS Large Capacitive-Load Driver Circuit

Reconfigurable Computing / VLSI / Digital design / Wavelet Transform / Power Consumption / Time Delay / Codesign / First-Order Logic / Low Power Consumption / High Speed / System on a Chip / Place and Route / Structural Testing / Low voltage / Integrated Circuit Design / Time Delay / Codesign / First-Order Logic / Low Power Consumption / High Speed / System on a Chip / Place and Route / Structural Testing / Low voltage / Integrated Circuit Design

A Direct Bootstrapped CMOS Large Capacitive-Load Driver Circuit

Reconfigurable Computing / VLSI / Digital design / Wavelet Transform / Power Consumption / Time Delay / Codesign / First-Order Logic / Low Power Consumption / High Speed / System on a Chip / Place and Route / Structural Testing / Low voltage / Integrated Circuit Design / Time Delay / Codesign / First-Order Logic / Low Power Consumption / High Speed / System on a Chip / Place and Route / Structural Testing / Low voltage / Integrated Circuit Design

Estimación de datos faltantes en estaciones meteorológicas de Venezuela vía un modelo de redes neuronales

Time Series / Back Propagation / Neural Network / Missing Data / Time Delay / Chaotic System / Dynamic System / Neural Net / Bayesian Information Criterion / Neural Network Model / Chaotic System / Dynamic System / Neural Net / Bayesian Information Criterion / Neural Network Model

Harmless and Profitless Delays in Discrete Competitive Lotka–Volterra Systems

Pure Mathematics / Nonlinear Analysis / Lotka Volterra / Density dependence / Time Delay / Type System / Growth rate / Interspecific competition / Difference equation / Population dynamic / Type System / Growth rate / Interspecific competition / Difference equation / Population dynamic

Transmit power efficiency of a multi-hop virtual cellular system

Wireless Systems / Routing algorithm / Computer Simulation / Standard Deviation / Time Delay / Network Routing / Path Loss / Mobile Communication System / Data Transmission / Cellular system / Cell Size / Mobile Terminal / Power Added Efficiency / Network Routing / Path Loss / Mobile Communication System / Data Transmission / Cellular system / Cell Size / Mobile Terminal / Power Added Efficiency

Some long time delay sliding mode control approaches

Manufacturing Engineering / Time Delay / Sliding mode control / First-Order Logic / ISA Transactions / Electrical And Electronic Engineering

Quantification of synchronization during atrial fibrillation by Shannon entropy: validation in patients and computer model of atrial arrhythmias

Algorithms / Biomedical Engineering / Entropy / Humans / Computer Simulation / Spatial Heterogeneity / Computer Model / Physiological / Atrial Fibrillation / Time Delay / Medical Physiology / Reproducibility of Results / Shannon entropy / Arrhythmia / Indexation / Sensitivity and Specificity / Electrical And Electronic Engineering / Right Atrium / Body Surface Potential Mapping / Spatial Heterogeneity / Computer Model / Physiological / Atrial Fibrillation / Time Delay / Medical Physiology / Reproducibility of Results / Shannon entropy / Arrhythmia / Indexation / Sensitivity and Specificity / Electrical And Electronic Engineering / Right Atrium / Body Surface Potential Mapping

Quantification of synchronization during atrial fibrillation by Shannon entropy: validation in patients and computer model of atrial arrhythmias

Algorithms / Biomedical Engineering / Entropy / Humans / Computer Simulation / Spatial Heterogeneity / Computer Model / Physiological / Atrial Fibrillation / Time Delay / Medical Physiology / Reproducibility of Results / Shannon entropy / Arrhythmia / Indexation / Sensitivity and Specificity / Electrical And Electronic Engineering / Right Atrium / Body Surface Potential Mapping / Spatial Heterogeneity / Computer Model / Physiological / Atrial Fibrillation / Time Delay / Medical Physiology / Reproducibility of Results / Shannon entropy / Arrhythmia / Indexation / Sensitivity and Specificity / Electrical And Electronic Engineering / Right Atrium / Body Surface Potential Mapping

Global stability in a delayed partial differential equation describing cellular replication

Mathematics / Mathematical Biology / Kinetics / Cell Cycle / Cell Division / Biological Sciences / Mathematical Sciences / Animals / Time Delay / First-Order Logic / PARTIAL DIFFERENTIAL EQUATION / Theoretical Models / Global stability / Transport Equation / Biological Sciences / Mathematical Sciences / Animals / Time Delay / First-Order Logic / PARTIAL DIFFERENTIAL EQUATION / Theoretical Models / Global stability / Transport Equation

Quantification of synchronization during atrial fibrillation by Shannon entropy: validation in patients and computer model of atrial arrhythmias

Algorithms / Biomedical Engineering / Entropy / Humans / Computer Simulation / Spatial Heterogeneity / Computer Model / Physiological / Atrial Fibrillation / Time Delay / Medical Physiology / Reproducibility of Results / Shannon entropy / Arrhythmia / Indexation / Sensitivity and Specificity / Electrical And Electronic Engineering / Right Atrium / Body Surface Potential Mapping / Spatial Heterogeneity / Computer Model / Physiological / Atrial Fibrillation / Time Delay / Medical Physiology / Reproducibility of Results / Shannon entropy / Arrhythmia / Indexation / Sensitivity and Specificity / Electrical And Electronic Engineering / Right Atrium / Body Surface Potential Mapping

A direct bootstrapped CMOS large capacitive-load driver circuit

Digital design / Power Consumption / Time Delay / Low Power Consumption / High Speed / Low voltage

Copyright © 2017 DATOSPDF Inc.